Method for fabricating a DRAM cell with a cup shaped storage node

A capacitor for a DRAM cell on a semiconductor substrate;

• said semiconductor substrate having a MOS transistor with a source region and a drain region;
• comprising:
• a storage electrode having an upright lower cylindrical portion and a hemispherical shaped upper portion;
• said hemispherical shaped upper portion having a hemispherical cross-sectional shape and a solid inside;
• said upright lower cylindrical portion in electrical contact with said source region in said substrate;
• said hemispherical shaped upper portion centered over said cylindrical lower portion;
• said hemispherical shaped upper portion has a bottom end adjacent to said upright lower cylindrical portion and a top end;
• said bottom end having a diameter in the range of between about 1000 and 3000 Å;
• said top end having a diameter in the range of between about 2000 and 5000 Å and said hemispherical shaped upper portion having a height in the range of between about 1000 and 3000 Å;
• said storage electrode is formed of polysilicon doped with an impurity concentration in the range of between about 1E20 and 1E22 atoms/cm3;
• and
• a capacitor dielectric layer and a top electrode covering said storage electrode.