Manufacturing method for a capacitor in an integrated memory circuit

A method for manufacturing a capacitor in an integrated memory circuit, which comprises the following process step sequence:

• applying a first layer made of a conducting first material onto a carrier and an auxiliary layer acting as etch-stop onto said first layer;
• producing a layer sequence on the auxiliary layer by alternating a layer made of the first material and a layer made of a second material;
• structuring the layer sequence, the auxiliary layer and the first layer to the carrier to form a layer structure with sides;
• forming a supporting structure from a conducting material covering the sides of the layer structure and reaching said carrier;
• forming an opening inside the layer structure extending entirely through the layer sequence after said forming-a-supporting-structure step;
• selectively removing the auxiliary layer and the layers made of the second material, defining free surfaces of the layers made from the first material and the supporting structure inside the layer structure;
• producing a capacitor dielectric on the free surfaces of the layers made from the first material and the supporting structure, the capacitor dielectric having a surface;
• and
• producing a counter electrode on the surface of the capacitor dielectric.