Process of reworking pin grid array chip carriers

A method of reworking PGA chip carriers having at least one unplated I/O pin, the method comprising the steps of:

• a. obtaining a PGA chip carrier having at least one I/O pin that is plated with gold over nickel and at least one I/O pin that is unplated but contains a corrosion product where the I/O pin should be plated;
• b. electrolytically etching the I/O pins with an aqueous etching solution comprising:
• a metal-providing compound selected from the group consisting of a silver salt, copper salt, copper cyanide, silver cyanide, gold cyanide or mixtures thereof, at a concentration in the range from 1 to 6 g/l as metal;
• potassium or sodium carbonate at a concentration in the range from 10 to 100 g/l;
• and
• potassium or sodium cyanide at a concentration in the range from 29 to 35 g/l,
• wherein the etching solution temperature is in the range from 20 to about 30° C., the etching solution pH is in the range from 11.5 to 13, and the current density is in the range from 7.5 to 9.5 mA/cm2, and wherein the plated I/O pin is stripped of gold and the unplated pin is stripped of corrosion product.