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US 6,191,441 B1Granted
Ferroelectric memory device and its drive method
AssigneeFujitsu Limited
InventorsMasaki Aoki, Hirotaka Tamura, Hideki Takauchi, Takashi Eshita
Life of this patent
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Abstract
A ferroelectric memory capable of writing data at a small operation voltage has an insulated-gate field effect transistor, a ferroelectric film, and a pair of capacitor electrodes formed on the ferroelectric film and facing each other, one of the pair of capacitor electrodes being electrically connected to the insulated gate. A ferroelectric memory device with a simple structure has an insulated-gate field effect transistor including a source, a drain, and an insulated gate, and a ferroelectric capacitor connected between the drain and the insulated gate.
Claims20
A ferroelectric memory device comprising:
- a semiconductor substrate;
- an insulated-gate field effect transistor including a gate insulating film formed on a surface of said semiconductor substrate, a gate electrode formed on the gate insulating film, and source and drain regions formed in a surface layer of said semiconductor substrate on both sides of the gate electrode;
- an insulating film formed over the surface of said semiconductor substrate and covering the gate electrode;
- a ferroelectric film formed on said insulating film;
- and
- a pair of capacitor electrodes formed on one surfacer of said ferroelectric film and facing each other, one of said pair of capacitor electrodes being electrically connected to the gate electrode.
3 more elements
A ferroelectric memory device comprising:
- an insulated-gate field effect transistor having a source, a drain, and an insulated gate;
- and
- a memory cell including a ferroelectric capacitor connected to the drain and the insulated gate, wherein said capacitor has a pair of electrodes disposed on one surface of a ferroelectric layer of the memory device.
A ferroelectric memory device comprising:
- a plurality of bit lines disposed in parallel;
- a plurality of word lines disposed in parallel, the word lines crossing said bit lines;
- and
- a ferroelectric memory cell connected at each cross point between said bit and word lines, said ferroelectric memory cell including an insulated-gate field effect transistor having a source, a drain, and an insulated date, and a ferroelectric capacitor connected across the drain and the insulated gate, wherein said capacitor has a pair of electrodes disposed on one surface of a ferroelectric layer of the memory device.
1 more element
A method of driving a ferroelectric memory device which comprises:
- a plurality of bit lines disposed in parallel;
- a plurality of word lines disposed in parallel, the word lines crossing said bit lines;
- and
- a ferroelectric memory cell connected at cross point between said bit and word lines, said ferroelectric memory cell including an insulated-gate field effect transistor having a source, a drain, and an insulated gate, and a ferroelectric capacitor connected across the drain and the insulated-gate, the method comprising the steps of:
- (a) connecting a selected word line to a ground potential and applying a first reference potential to other word lines and all the bit lines, to write first information in all the ferroelectric memory cells connected to the selected word line;
- (b) supplying in succession the ground potential and the first reference potential to ferroelectric memory cells to be written with first information among the ferroelectric memory cells connected to the selected word line, and supplying a second reference potential smaller than the first reference potential to other bit lines and a third reference potential larger than the second reference potential to other word lines, to write first information in the ferroelectric memory cells to be written with first information;
- and
- (c) setting potentials of the bit lines and potentials of the word lines other than the selected word line to same potentials as said step (b), and supplying a fourth reference potential larger than the first reference potential to the selected word line, to write second information in ferroelectric memory cells not written with first information at said step (b) among the ferroelectric memory cells connected to the selected word line.
5 more elements
A ferroelectric memory device comprising:
- a semiconductor substrate;
- an insulated gate electrode formed on said semiconductor substrate;
- a source region and a drain region formed in a surface layer of said semiconductor substrate on both sides of said insulated-gate;
- a first insulating layer formed over a surface of said semiconductor substrate, surrounding said insulated gate electrode, and forming a common upper surface;
- an aperture groove reaching the drain through said first insulating layer;
- a bit wiring burying said aperture groove and forming an upper surface common with said first insulating film;
- and
- a ferroelectric layer formed on the common upper surface and covering said insulated gate electrode and said bit wiring.
5 more elements
Dependencies are inferred from the claim text.