Method of bonding a III-V group compound semiconductor layer on a silicon substrate
AssigneeNEC Corporation
InventorKazuo Mori
Life of this patent
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Abstract
Prior to a heat treatment for bonding a III-V group compound semiconductor layer on a silicon substrate, a thermal stress relaxation layer is provided between the silicon layer and the III-V group compound semiconductor layer thermal stress relaxation layer, having a thermal expansion coefficient equal or near to the thermal expansion coefficient of the III-V group compound semiconductor layer and having a rigidity coefficient being sufficiently large to suppress generation of any crystal defects in the III-V group compound semiconductor layer due to a thermal stress generated in the heat treatment and subsequent cooling stage by the difference in the thermal expansion coefficient between the III-V group compound semiconductor layer and the silicon layer.
Claims35
A method for bonding a III-V group compound semiconductor layer to a silicon layer, said method comprising the steps of:
- preparing an intermediate layer sandwiched between a silicon layer and a III-V group compound semiconductor layer, said III-V group compound semiconductor layer having a different thermal expansion coefficient from a thermal expansion coefficient of said silicon layer and having a different rigidity coefficient from a rigidity coefficient of said silicon layer;
- and
- subjecting said intermediate, silicon and III-V group compound semiconductor layers to a heat treatment at a temperature not less than 450° C.,
- wherein said intermediate layer comprises an amorphous semiconductor layer capable of preventing a threading dislocation from extending through said amorphous semiconductor layer into said III-V group compound semiconductor layer, said threading dislocation being caused by a thermal stress generated in said heat treatment and subsequent cooling stage due to the difference in the thermal expansion coefficient between said III-V group compound semiconductor layer and said silicon layer, and
- said amorphous semiconductor layer comprising an amorphous semiconductor being kept in an amorphous state after said heat treatment has been carried out.
A method for bonding a III-V group compound semiconductor layer to a silicon layer, said method comprising the steps of:
- preparing an intermediate layer sandwiched between a silicon layer and a III-V group compound semiconductor layer, said III-V group compound semiconductor layer having a different thermal expansion coefficient from a thermal expansion coefficient of said silicon layer and having a different rigidity coefficient from a rigidity coefficient of said silicon layer;
- and
- subjecting said intermediate, silicon and III-V group compound semiconductor layers to a heat treatment at a temperature not less than 450° C.,
- wherein said intermediate layer comprises an insulation layer in an amorphous state capable of preventing a threading dislocation from extending through said insulation layer into said III-V group compound semiconductor layer, said threading dislocation being caused by a thermal stress generated in said heat treatment and subsequent cooling stage due to the difference in the thermal expansion coefficient between said III-V group compound semiconductor layer and said silicon layer, and
- said insulation layer comprising an insulation material being kept in an amorphous state even after said heat treatment has been carried out.
Dependencies are inferred from the claim text.