Shallow trench isolation method
AssigneeLucent Technologies Inc.
InventorsAlan Sangone Chen, Seungmoo Choi, Donald Thomas Cwynar, Timothy Edward Doyle, Troy A. Giniecki
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AssigneeLucent Technologies Inc.
InventorsAlan Sangone Chen, Seungmoo Choi, Donald Thomas Cwynar, Timothy Edward Doyle, Troy A. Giniecki
Estimating the term…
A method of manufacturing a semiconductor device using shallow trench isolation is provided, wherein a plurality of protrusions are formed in the exposed surface of the mask layer overlying the active area of the device. The protrusions are preferably formed by forming a photo-resist layer on the surface of the mask layer and patterning the photo-resist layer such that the photo-resist layer defines a plurality of protrusion areas and a depression area within the defined active area. A portion of the mask layer is removed in the defined depression area to form a plurality of protrusions in the mask layer. Thereafter, a dielectric layer is deposited on the exposed surface of the mask layer and in the shallow trench and evenly planarized.
A method of manufacturing a semiconductor device using shallow trench isolation, comprising:
A method of manufacturing a semiconductor device using shallow trench isolation, comprising:
A method of manufacturing a semiconductor device using shallow trench isolation, comprising:
Dependencies are inferred from the claim text.