US 6,190,984 B1Granted

Method for fabricating of super self-aligned bipolar transistor

AssigneesElectronics and Telecommunications Research Institute, Korea Telecommunication Authority

InventorsByung-Ryul Ryum, Deok-Ho Cho, Tae-Hyeon Han, Soo-Min Lee, Kwang-Eui Pyun

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Abstract

The invention relates to a method for manufacturing a super self-aligned heterojunction bipolar transistor which is capable of miniaturizing an element, simplifying the process step thereof by employing a selective collector epitaxial growth process without using a trench for isolating between elements. According to the invention, isolation between elements is derived by using a mask defining an emitter region and a second spacer. The base layer has multi-layer structure being made of a Si, an undoped SiGe, a SiGe doped a p-type impurity in-situ and Si. Also, the selective epitaxial growth for a base is not required. Thus, it can be less prone to a flow of leakage current or an emitter-base-collector short effect.

Claims15

Dependent claims

A method for manufacturing a super self-aligned heterojunction bipolar transistor, which comprising the steps of:

(a) forming sequently a first oxidation film, a conducting thin film for a base electode and a second oxidation film on top of a semiconductor substrate formed a buried collector;
(b) patterning the second oxidation film and the conducting thin film, and forming a first spacer at sides of an exposed portion of the second oxidation film. and the conducting thin film;
(c) removing an exposed first oxidation film, and selectively growing a collector thin film on a defined active region such that its height is approximately similar to that of the conducting thin film for the base electrode;
(d) growing a muti-layer base with a heterojunction structure on a semifinished structure obtained from said step(c);
(e) exposing a portion of the first oxidation film by using a mask defining the base electrode, and forming a third oxidation film on a above semifinished structure;
(f) exposing a top of the multi-layer base by using a mask defining an emitter region, and forming a second spacer on sides of an etched portion;
(g) growing selectively an emitter layer on the emitter region to be defined from the steps;
(h) forming an emitter electrode on the emitter layer;
and
(i) performing a metal wiring process.

7 more elements

A method for manufacturing a self-assigned heterojunction bipolar transistor comprising the steps of:

(a) forming sequentially a first oxidation film, an electrically conducting thin film and a second oxidation film on top of a semiconductor substrate in which a buried collector is formed;
(b) patterning the second oxidation film and the electrically conducting thin film, and forming a first spacer at sides of an exposed portion of the second oxidation film and the electrically conducting thin film;
(c) removing an exposed first oxidation film, and selectively overgrowing a collector thin film on a defined active region;
(d) removing the second insulating film and the first oxidation film;
(e) forming a Si/SiGe layer with a heterojunction structure and a metallic base electrode layer on a resulting structure obtained from step (d);
(f) exposing a portion of the first oxidation film by using a mask defining a base electrode, and forming a third oxidation film on a semifinished structure obtained from said step (e);
(g) exposing a surface of the Si/SiGe layer by using a mask defining an emitter region, and forming a second spacer on sides of an etched portion;
(h) growing selectively an emitter film in the emitter region;
(i) forming an emitter electrode on the emitter thin film;
and (j) performing a metal wiring process.

7 more elements

Dependencies are inferred from the claim text.