Methods of forming trench isolation regions using preferred stress relieving layers and techniques to inhibit the occurrence of voids

A method of forming a trench isolation region, comprising the steps of:

• forming a pad oxide layer on a surface of a semiconductor substrate;
• forming a pad nitride layer on the pad oxide layer, opposite the surface;
• patterning the pad nitride layer and the pad oxide layer to define a trench mask;
• forming a trench in the semiconductor substrate by etching the semiconductor substrate using the trench mask as an etching mask;
• oxidizing a bottom and sidewalls of the trench to form a first electrically insulating layer thereon;
• forming a stress-relief nitride layer on the first electrically insulating layer, opposite sidewalls of the trench;
• then
• filling the trench with a second electrically insulating layer;
• planarizing the second electrically insulating layer using the patterned pad nitride layer as an etch stop;
• then
• etching the patterned pad nitride layer and the stress-relief nitride layer to define a recess that extends below a surface of the semiconductor substrate and between the second electrically insulating layer and the first electrically insulating layer;
• and
• forming a third electrically insulating layer that extends on the planarized second electrically insulating layer and extends into the recess.