Method of manufacturing a capacitor as part of an integrated semiconductor circuit
AssigneeSGS-Thomson Microelectroncis S.A.
InventorYvon Gris
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Abstract
The present invention relates to a method of manufacturing a capacitor in a BICMOS integrated circuit manufacturing technology, including the steps of depositing, on a thick oxide region, a polysilicon layer corresponding to a MOS transistor gate electrode; successively depositing a base polysilicon layer and a silicon oxide layer; forming an opening in these last two layers; performing a thermal anneal in an oxidizing atmosphere; depositing a silicon nitride layer and a spacer polysilicon layer; depositing an emitter polysilicon layer; and making a contact with the base polysilicon layer and a contact with the emitter polysilicon layer.
Claims21
A method of manufacturing of a capacitor in a BICMOS integrated circuit manufacturing technology, including the steps of:
- depositing, on an oxide region, a gate polysilicon layer corresponding to a MOS transistor gate electrode,
- successively depositing a base polysilicon layer and a silicon oxide layer,
- wherein the gate polysilicon layer and the base polysilicon layer form a first electrode of the capacitor,
- forming an opening in the base polysilicon layer and the silicon oxide layer,
- performing a thermal anneal in an oxidizing atmosphere, to form a thermal oxide layer,
- depositing a silicon nitride layer and a spacer polysilicon layer, to completely fill up the opening after an etching,
- depositing an emitter polysilicon layer to form a second electrode of the capacitor, and
- making a contact with the base polysilicon layer to provide a first contact for the capacitor and a contact with the emitter polysilicon layer to provide a second contact for the capacitor.
A method of manufacturing a capacitor as part of an integrated semiconductor circuit, the method comprising:
- depositing, on an oxide region, a first polysilicon layer;
- depositing a second polysilicon layer on the first polysilicon layer, the first and second polysilicon layer to form a first electrode of the capacitor;
- depositing a silicon oxide layer over the second polysilicon layer;
- forming an opening in the second polysilicon layer and the silicon oxide layer to expose the first polysilicon layer at a bottom of the opening;
- forming an oxide layer in the opening;
- depositing a silicon nitride layer in the opening over the oxide layer;
- depositing a third polysilicon layer in the opening over the silicon nitride layer, such that the oxide layer and the silicon nitride layer are between the third polysilicon layer and the first polysilicon at the bottom of the opening and are between the third polysilicon and the second polysilicon layer on sides of the opening;
- and
- depositing a fourth polysilicon layer over the third polysilicon layer, the third and fourth polysilicon layers forming a second electrode of the capacitor.
Dependencies are inferred from the claim text.