Flash memory device and fabrication method thereof
AssigneeHyundai Electronics Industries Co., Ltd.
InventorHee-Cheol Jeong
Life of this patent
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Abstract
A flash memory device and fabrication method simplify the fabrication process of a semiconductor EEPROM device through a self-aligning process. The device includes a semiconductor substrate in which source and drain regions are defined, a first insulation layer formed on the semiconductor substrate, a first conductive layer pattern formed on a portion of the first insulation layer, sidewall spacers formed of a second conductive layer neighboring each sidewall of the first conductive layer pattern and covered by second and third insulation layers, and a third conductive layer pattern formed on the insulation layers and connected with the first conductive layer pattern.
Claims12
An method of making a memory device, comprising the steps of:
- forming a first insulation layer on a substrate;
- forming a first conductive layer on a portion of the first insulation layer;
- forming impurity regions in the substrate;
- forming a second insulation layer on sidewalls of the first conductive layer pattern;
- forming, on each of two sides of the first conductive layer pattern, a conductive sidewall spacer on the second insulation layer and the first insulation layer wherein the conductive sidewall spacers form a floating gate;
- forming a third insulation layer on the conductive sidewall spacers such that the first, second and third insulation layers together completely surround the conductive sidewall spacers;
- and
- forming a continuous third conductive layer pattern on the first, second and third insulation layers, the continuous third conductive layer pattern conductively coupled to the first conductive pattern.
Dependencies are inferred from the claim text.