High cell density power rectifier

A method of fabricating a rectifier device, comprising the steps of:

• providing a silicon semiconductor substrate;
• forming a plurality of pedestals on the top surface of said semiconductor substrate;
• forming a gate oxide on said semiconductor substrate adjacent the pedestals;
• forming a first spacer adjacent the pedestal sidewalls;
• performing a first implant into said semiconductor substrate of a dopant of a first conductivity type, the implant being laterally defined by said first spacer;
• removing said first spacer;
• forming a conductive gate layer on said gate oxide layer;
• forming a second spacer on said gate layer adjacent said conductive pedestal sidewalls;
• etching said first metal layer to expose said semiconductor substrate between adjacent spacers;
• depositing a layer of a metal which forms a silicide with silicon over said second spacer and exposed substrate;
• performing a second implant of a dopant of a second conductivity type, said second implant being laterally defined by said second spacer and penetrating said metal layer;
• thermally processing said semiconductor substrate at a temperature sufficient to convert at least a portion of said metal layer over said semiconductor substrate to a silicide and diffuse some of said dopant of said second conductivity type from said metal layer into said semiconductor substrate to form a shallow drain region;
• wherein said first and second implants and said thermal processing step define a plurality of channel regions adjacent said pedestals and below said gate oxide;
• and
• forming first and second electrically conductive contact layers on said top and bottom surfaces, respectively, to provide a current flow path between said surfaces.