Semiconductor memory device
AssigneeNEC Corporation
InventorYoshihiro Takaishi
Life of this patent
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Abstract
In a semiconductor memory device which utilizes a folded bit line system, a plurality of bit lines are placed in a parallel direction while a plurality of word lines are placed in a vertical direction. A plurality of device region patterns are arranged so as to cross the bit lines and the word lines. A separating distance between adjacent device region patterns is equal to a first space while a separating distance between closest portions of the adjacent device region patterns is equal to a second space. Each of the device region patterns is inclined for the bit line with a predetermined angle so that the first space exceeds the second space.
Claims21
A semiconductor memory device which utilizes a folded bit line system, comprising:
- a plurality of bit lines which are placed in a parallel direction;
- a plurality of word lines which are placed in a vertical direction, said bit lines and said word lines being perpendicularly crossed to each other;
- a plurality of device region patterns which are arranged so as to cross said bit lines and said word lines;
- said device region pattern has first wiring patterns in both ends and a second wiring pattern in a center portion,
- a capacitor contact is arranged in each of said first wiring patterns,
- a bit contact is arranged in said second wiring pattern,
- a separating distance between adjacent device region patterns being equal to a first space which corresponds to a closest vertical distance between said capacitor contacts,
- a separating distance between closest portions of said adjacent device region patterns being equal to a second space,
- each of said device region pattern being inclined relative to said bit line with a predetermined angle so that the first space exceeds the second space.
A semiconductor memory device which utilizes a folded bit line system, comprising:
- a plurality of bit lines which are placed in a parallel direction;
- a plurality of word lines which are placed in a vertical direction, said bit lines and said word lines being perpendicularly crossed to each other;
- a plurality of device region patterns which are arranged so as to cross said bit lines and said word lines;
- a separating distance between adjacent device region patterns being equal to a first space,
- a separating distance between closest portions of said adjacent device region patterns being equal to a second space,
- each of said device region patterns being inclined relative to said bit line with a predetermined angle not exceeding approximately 13 degrees so that the first space exceeds the second space.
Dependencies are inferred from the claim text.