Semiconductor device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsShunpei Yamazaki, Takeshi Fukunaga
Life of this patent
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Abstract
There is provided a semiconductor device having a new structure which allows a high reliability and a high field effect mobility to be realized in the same time. In an insulated gate transistor having an SOI structure utilizing a mono-crystal semiconductor thin film on an insulating layer, pinning regions are formed at edge portions of a channel forming region. The pinning regions suppress a depletion layer from spreading from the drain side and prevent a short-channel effect. In the same time, they also function as a path for drawing out minority carriers generated by impact ionization to the outside and prevent a substrate floating effect from occurring.
Claims23
A semiconductor device, comprising at least:
- a source region, a drain region and a channel forming region formed by utilizing a mono-crystal semiconductor thin film on an insulating layer;
- a field oxide film surrounding said source region, said drain region and said channel forming region;
- and
- a gate insulating film and a gate electrode formed on said channel forming region;
- impurity regions which shift an energy band of said channel forming region being provided selectively at side edges of said channel forming region contacting with said field oxide film.
A semiconductor device, comprising at least:
- a source region, a drain region and a channel forming region formed by utilizing a mono-crystal semiconductor thin film on an insulating layer;
- a field oxide film surrounding said source region, said drain region and said channel forming region;
- and
- a gate insulating film and a gate electrode formed on said channel forming region;
- impurity regions which shift an energy band of said channel forming region being provided selectively at side edges of said channel forming region contacting with said field oxide film;
- and
- said impurity regions suppressing a depletion layer from spreading from said drain region to said source region.
A semiconductor device, comprising at least:
- a source region, a drain region and a channel forming region formed by utilizing a mono-crystal semiconductor thin film on an insulating layer;
- a field oxide film surrounding said source region, said drain region and said channel forming region;
- and
- a gate insulating film and a gate electrode formed on said channel forming region;
- impurity regions which shift an energy band of said channel forming region being provided selectively at side edges of said channel forming region contacting with said field oxide film;
- and
- said impurity regions suppressing a depletion layer from spreading from said drain region to said source region and drawing out minority carriers generated by impact ionization in the vicinity of said drain region to the outside of said channel forming region.
A semiconductor device, comprising at least:
- a source region, a drain region and a channel forming region formed by utilizing a mono-crystal semiconductor thin film on an insulating layer;
- a field oxide film surrounding said source region, said drain region and said channel forming region;
- and
- a gate insulating film and a gate electrode formed on said channel forming region;
- impurity regions which shift an energy band of said channel forming region being provided selectively at side edges of said channel forming region contacting with said field oxide film;
- and
- said impurity regions reaching the inside of said source region/drain region.
A semiconductor device, comprising at least:
- a source region, a drain region and a channel forming region formed by utilizing a mono-crystal semiconductor thin film on an insulating layer;
- a field oxide film surrounding said source region, said drain region and said channel forming region;
- and
- a gate insulating film and a gate electrode formed on said channel forming region;
- first impurity regions which shift an energy band of said channel forming region being provided selectively at side edges of said channel forming region contacting with said field oxide film;
- and
- a second impurity region presenting a conductive type opposite from said first impurity region being formed intentionally and locally within said channel forming region so as not to contact with said source region/drain region and said first impurity regions.
A semiconductor device, comprising at least:
- a source region, a drain region and a channel forming region formed by utilizing a mono-crystal semiconductor thin film on an insulating layer;
- a field oxide film surrounding said source region, said drain region and said channel forming region;
- and
- a gate insulating film and a gate electrode formed on said channel forming region;
- first impurity regions which shift an energy band of said channel forming region being provided selectively at side edges of said channel forming region contacting with said field oxide film;
- a second impurity region presenting a conductive type opposite from said first impurity region being formed intentionally and locally within said channel forming region so as not to contact with said source region/drain region and said first impurity regions;
- and
- said first impurity regions suppressing a depletion layer from spreading from said drain region to said source region and said second impurity region controlling a threshold voltage.
A semiconductor device, comprising at least:
- a source region, a drain region and a channel forming region formed by utilizing a mono-crystal semiconductor thin film on an insulating layer;
- a field oxide film surrounding said source region, said drain region and said channel forming region;
- and
- a gate insulating film and a gate electrode formed on said channel forming region;
- first impurity regions which shift an energy band of said channel forming region being provided selectively at side edges of said channel forming region contacting with said field oxide film;
- a second impurity region presenting a conductive type opposite from said first impurity region being formed intentionally and locally within said channel forming region so as not to contact with said source region/drain region and said first impurity regions;
- and
- said first impurity regions suppressing a depletion layer from spreading from said drain region to said source region and drawing out minority carriers generated by impact ionization in the vicinity of said drain region to the outside of said channel forming region and said second impurity region controlling a threshold voltage.
Dependencies are inferred from the claim text.