Back to results
US 6,184,552 B2Granted
Non-volatile memory cell with non-trenched substrate
AssigneeNational Semiconductor Corporation
InventorsAlexander Kalnitsky, Albert Bergemont
Life of this patent
Estimating the term…
Abstract
In a non-volatile memory cell that has a select transistor and a memory transistor, the substrate trenching that occurs when the gate of the select transistor and the stacked gate of the memory transistor are initially defined is eliminated by forming the gate of the select transistor and the stacked gate of the memory transistor to have substantially the same step height.
Claims7
A memory cell formed on a semiconductor material, the memory cell comprising:
- a memory transistor having:
- a first layer of insulation material formed on the semiconductor material;
- a floating gate formed on the first layer of insulation material;
- an interpoly dielectric formed on the floating gate;
- and
- a control gate formed on the interpoly dielectric;
- and
- a select transistor having:
- a second layer of insulation material formed on the semiconductor material;
- and
- a select gate formed on the second layer of insulation material, the select gate having a conductive region, the conductive region having a first sidewall with a first cavity formed therein and an opposing second sidewall with a second cavity formed therein, the first and second cavities being spaced-apart and completely covered with a layer of oxide.
8 more elements
Dependencies are inferred from the claim text.