Method for multiple phase polishing of a conductive layer in a semidonductor wafer

Abstract

A method of planarizing a copper containing conductive layer of a semiconductor wafer forms a blanketing copper containing layer within and upon a patterned substrate layer. Chemical mechanical polish (CMP) planarizing is performed on the copper containing layer at a relatively fast rate of removal until most of the layer is removed. The remaining portion of the layer is then CMP planarized at a second rate of removal, which is slower than the first rate of removal, until the copper containing layer is substantially completely removed and a barrier layer underlying the copper containing layer is reached. The multiple phase planarization of the copper containing layer avoids excessive dishing and pattern erosion while maintaining high throughput and uniform removal.

Dependencies are inferred from the claim text.