Method for DRAM cell arrangement and method for its production
AssigneeSiemens Aktiengesellschaft
InventorsFranz Hofman, Lothar Risch, Wolfgang Roesner, Wolfgang Krautschneider
Life of this patent
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Abstract
A memory cell contains at least one transistor and one capacitor connected to an upper bit line. The capacitor contains a first capacitor electrode arranged above the transistor, and is connected to the transistor. The upper bit line can be created in self-adjusted fashion on the basis of trenches which are of different widths, which extend transversely to one another, and which are arranged between the first capacitor electrodes. At least a part of each first capacitor electrode can be created from a layer which is structured by the trenches. Trenches can be narrowed by spacers.
Claims4
A method for producing a DRAM cell arrangement, comprising the steps of:
- creating as part of a capacitor a first capacitor electrode above a transistor such that it is connected to the transistor;
- providing edges of the first capacitor electrode with a capacitor dielectric;
- creating an upper bit line connected to the capacitor and which annularly surrounds the first capacitor electrode provided with the capacitor dielectric;
- creating substantially parallel first trenches;
- creating second trenches substantially parallel and which extend transversely to the first trenches;
- making the first trenches and the second trenches such that the first trenches are narrower than the second trenches;
- and
- creating the upper bit lines which extend parallel to the second trenches in self-adjusted fashion by depositing and anisotropic etching of material.
A method for producing a DRAM cell arrangement, comprising the steps of:
- creating as part of a capacitor a first capacitor electrode above a transistor such that it is connected to the transistor;
- providing the first capacitor electrode with a capacitor dielectric;
- creating an upper bit line connected to the capacitor;
- creating substantially parallel first trenches;
- creating second trenches substantially parallel and which extend transversely to the first trenches;
- making the first trenches and the second trenches such that the first trenches are narrower than the second trenches;
- and
- creating the upper bit lines which extend parallel to the second trenches in self-adjusted fashion by depositing and anisotropic etching of material.
Dependencies are inferred from the claim text.