Semiconductor device geometrical pattern correction process and geometrical pattern extraction process

A geometrical pattern correction method for a semiconductor device, said method comprising the steps of:

• detecting a diffusion layer corresponding concave shape;
• and
• correcting by indenting corners on both sides of an inner bottom surface of said diffusion layer corresponding concave shape in order to ensure the projection of a gate from an inside of said diffusion layer corresponding concave shape for the purpose of preventing corner rounding.

A geometrical patten correction method for a semiconductor device, said method comprising the steps of:

• detecting a diffusion layer corresponding concave shape;
• and
• correcting by making project outward both sides of an edge of a transistor gate corresponding part projecting from an inside of said diffusion layer corresponding concave shape in order to ensure the projection of said gate from said inside ofthe diffusion layer corresponding concave shape for the purpose of preventing corner rounding.

A geometrical pattern correction method for a semiconductor device, said method comprising the steps of:

• detecting a diffusion layer corresponding concave shape;
• and
• correcting by making project outward both corners of an edge of a transistor gate corresponding part projecting from an inside of said diffusion layer corresponding concave shape in order to ensure the projection of said gate from said inside of the diffusion layer corresponding concave shape for the purpose of preventing corner rounding.