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US 6,150,699 AGranted
Tri-voltage Bi-CMOS semiconductor device
AssigneeNEC Corporation
InventorMasaru Wakabayashi
Life of this patent
Estimating the term…
Abstract
A Bi-CMOS semiconductor device having a CMOS device region and a bipolar transistor region is provided wherein the bipolar transistor has a collector region of a first conductivity type and the CMOS region has at least one element region of a second conductivity type which is positioned adjacent to the collector region as well as wherein a single buried layer of the first conductivity type is provided which extends under the element region of the CMOS region and the collector region.
Claims11
A Bi-CMOS semiconductor device comprising:
- a CMOS device region and a bipolar transistor region,
- said bipolar transistor region comprising a collector region of a first conductivity type and a collector contact region interior to a perimeter of said collector region,
- said CMOS device region comprising at least one element region of a second conductivity type which is positioned adjacent to said collector region,
- a single buried layer of the first conductivity type extending under said element region of the CMOS device region and said collector region, and
- a first conductivity type well region contacting and surrounding said element region and said perimeter of said collector region, said first conductivity type well region and said collector region being of differing impurity concentrations.
2 more elements
A Bi-CMOS semiconductor device comprising:
- a first region comprising
- a first bipolar transistor with a collector region of a first conductivity type,
- a first MOS transistor with an element region of a second conductivity type, said first MOS transistor element region being located at a first end adjacent to said first bipolar transistor collector region, and
- a second MOS transistor with an element region of the first conductivity type, said second MOS transistor element region being located at a first end adjacent to a second end of said first MOS transistor element region,
- a first buried layer of the first conductivity type embedded in a substrate of the second conductivity type and extending partially under said first bipolar transistor collector region and said first and second MOS transistor element regions such that a portion of said first bipolar transistor collector region and a portion of said second MOS transistor element region are in contact with said substrate;
- and
- a second region adjacent said first region, said second region comprising a second bipolar transistor surrounded by a surrounding buried layer of the second conductivity type,
- wherein said first bipolar transistor collector region and said second MOS transistor element region are adapted to share a first voltage, said first MOS transistor element region is adapted to be applied with a second voltage different from the first voltage, and said surrounding buried layer is adapted to be applied with a third voltage different from the first and second voltages.
5 more elements
Dependencies are inferred from the claim text.