Method and pattern for avoiding micro-loading effect in an etching process
AssigneeVanguard International Semiconductor Corporation
InventorsChia-Ching Tung, Cheng-Lung Lu, Hung-Yi Luo
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Abstract
A method for avoiding micro-loading effect during etching is disclosed. The method comprises the steps of: providing a semiconductor substrate with a layer to be patterned and etched formed thereover; forming a masking layer over the layer to be patterned; defining a row pattern in the masking layer, the row pattern comprising a plurality of rectangles and a plurality of connecting bars, each of the connecting bars connecting two of the rectangles; and removing a portion of the layer to be patterned, to form a patterned layer with a recessed channel, by using the masking layer as a mask with the row pattern.
Claims7
A row pattern for avoiding micro-loading effect in an etching process, said row pattern comprising:
- a plurality of rectangles;
- and
- a plurality of connecting bars, each of said connecting bars interconnecting every two of said rectangles, said rectangles have a length along a longitudinal direction of said row pattern approximately equal to about 1 to 5 times of a length of said connecting bars, said rectangles have a width of about 2 times to about 5 times of a width of said connecting bars, said width of said rectangles and said width of said connecting bars being measured perpendicular to a longitudinal direction of said row pattern.
Dependencies are inferred from the claim text.