Back to results
US 6,150,285 AGranted
Method for simultaneous deposition and sputtering of TEOS
AssigneeAdvanced Micro Devices, Inc.
InventorsPaul R. Besser, Minh Van Ngo
Life of this patent
Estimating the term…
Abstract
A method for making 0.25 micron semiconductor chips includes using TEOS as the high density plasma (HDP) inter-layer dielectric (ILD). More specifically, after establishing a predetermined aluminum line pattern on a substrate, TEOS is deposited and simultaneously with the TEOS deposition, excess TEOS is etched away, thereby avoiding hydrogen embrittlement of and subsequent void formation in the aluminum lines that could otherwise occur if silane were used as the HDP ILD.
Claims6
A method for making a semiconductor chip having electrically conductive lines, comprising:
- providing at least one substrate;
- supporting the substrate on an e-chuck in a chamber;
- energizing the e-chuck with electrical power;
- establishing at least one pattern of electrically conductive lines on the substrate;
- and
- depositing TEOS between the electrically conductive lines by directing TEOS onto the lines while simultaneously porting Argon into the chamber through an inlet port to remove excess TEOS.
3 more elements
Dependencies are inferred from the claim text.