Method of manufacturing a shallow trench isolation structure for a semiconductor device
AssigneesSiemens Microelectronics, Inc., Kabushiki Kaisha Toshiba
InventorsNaohiro Shoda, Peter Weigand
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AssigneesSiemens Microelectronics, Inc., Kabushiki Kaisha Toshiba
InventorsNaohiro Shoda, Peter Weigand
Estimating the term…
A method for fabricating a shallow trench isolation structure involves several steps. The steps of an illustrative method include forming a first resist pattern on a substrate, etching the substrate to form a shallow trench therein using the first resist pattern as a mask, removing the first resist pattern from the substrate, depositing an oxide layer on the substrate including in the shallow trench, depositing a polish stop layer on the oxide layer, forming a second resist pattern on a portion of the polish stop layer substantially covering the shallow trench using the same mask as the mask for the first resist pattern, etching the polish stop layer, removing the second resist pattern leaving the portion of the polish stop layer substantially covering the shallow trench, polishing the oxide layer using the portion of the polish stop layer substantially covering the shallow trench as a polish stop, and removing the portion of the polish stop layer substantially covering the shallow trench.
A method for manufacturing a shallow trench isolation structure for a semiconductor device, said method comprising the steps of:
A method for manufacturing a shallow trench isolation structure for a semiconductor device, said method comprising the steps of:
Dependencies are inferred from the claim text.