Semiconductor device and method for fabricating the same

A nonvolatile semiconductor memory device comprising:

• a substrate having a surface including a first surface region at a first level, a second surface region at a second level lower than the first level, and a step side region linking the first and second surface regions together;
• a channel region formed in the first surface region of the substrate;
• source and drain regions formed to interpose the channel region therebetween;
• an insulating film formed on the surface of the substrate;
• a floating gate formed on the insulating film;
• and
• a control gate capacitively coupled to the floating gate,
• wherein
• the drain region includes:
• a low-concentration impurity layer which is formed in the second surface region and which has one end extending toward the step side region;
• and a high-concentration impurity layer which is connected to the low-concentration impurity layer and which is formed in a region distant from the channel region, an impurity concentration of the low-concentration impurity layer being lower than that of the high-concentration impurity layer,
• the channel region includes a high-concentration impurity region being located close to the step side region and having an impurity concentration higher than that of the channel region in a part thereof adjacent to the source region,
• the floating gate covers the step side region and at least a part of the low-concentration impurity layer via the insulating film, and
• the first surface region is an upper surface of an epitaxially grown layer formed on the second surface region.

A nonvolatile semiconductor memory device comprising:

• a substrate having a surface including a first surface region at a first level, a second surface region at a second level lower than the first level, and a step side region linking the first and second surface regions together;
• a channel region formed in the first surface region of the substrate;
• source and drain regions formed to interpose the channel region therebetween;
• an insulating film formed on the surface of the substrate;
• a floating gate formed on the insulating film;
• and
• a control gate capacitively coupled to th e floating gate,
• wherein
• the drain region includes:
• a low-concentration impurity layer which is formed in the second surface region and which has one end extending toward the step side region;
• and a high-concentration impurity layer which is connected to the low-concentration impurity layer and which is formed in a region distant from the channel region, an impurity concentration of the low-concentration impurity layer being lower than that of the high-concentration impurity layer,
• an extremely-low-concentration impurity layer is formed in a part of the channel region adjacent to the step side region, an impurity concentration of the extremely-low-concentration impurity layer being lower than that of the other part of the channel region,
• the floating gate covers the step side region and at least a part of the low-concentration impurity layer via the insulating film, and
• the first surface region is an upper surface of an epitaxially grown layer formed on the second surface region.

A semiconductor integrated circuit device comprising:

• a plurality of nonvolatile memory cells;
• and
• a driver circuit for driving the plurality of nonvolatile memory cells,
• each of the plurality of nonvolatile memory cells including:
• a substrate having a surface including a first surface region at a first level, a second surface region at a second level lower than the first level, and a step side region linking the first and second surface regions together;
• a channel region formed in the first surface region of the substrate;
• source and drain regions formed to interpose the channel region therebetween;
• an insulating film formed on the surface of the substrate;
• a floating gate formed on the insulating film;
• and
• a control gate capacitively coupled to the floating gate,
• wherein:
• the drain region includes:
• a low-concentration impurity layer which is formed in the second surface region and which has one end extending toward the step side region;
• and a high-concentration impurity layer which is connected to the low-concentration impurity layer and which is formed in a region distant from the channel region, an impurity concentration of the low-concentration impurity layer being lower than that of the high-concentration impurity layer,
• the low-concentration impurity layer covers a corner portion between the second surface region and the step side region such that said low-concentration impurity layer does not reach the first surface region,
• the floating gate covers the step side region and at least a part of the low-concentration impurity layer via the insulating film, and
• the first surface region is an upper surface of an epitaxially grown layer formed on the second surface region.

A semiconductor integrated circuit device comprising:

• a plurality of nonvolatile memory cells;
• and
• a driver circuit for driving the plurality of nonvolatile memory cells,
• each of the plurality of nonvolatile memory cells including:
• a substrate having a surface including a first surface region at a first level, a second surface region at a second level lower than the first level, and a step side region linking the first and second surface regions together;
• a channel region formed in the first surface region of the substrate;
• source and drain regions formed to interpose the channel region therebetween;
• an insulating film formed on the surface of the substrate;
• a floating gate formed on the insulating film;
• and
• a control gate capacitively coupled to the floating gate,
• wherein:
• the drain region includes:
• a low-concentration impurity layer which is formed in the second surface region and which has one end extending toward the step side region;
• and a high-concentration impurity layer which is connected to the low-concentration impurity layer and which is formed in a region distant from the channel region, an impurity concentration of the low-concentration impurity layer being lower than that of the high-concentration impurity layer,
• the channel region includes a high-concentration impurity region being located close to the step side region and having an impurity concentration higher than that of the channel region in a part thereof adjacent to the source region,
• the floating gate covers the step side region and at least a part of the low-concentration impurity layer via the insulating film, and
• the first surface region is an upper surface of an epitaxially grown layer formed on the second surface region.

A semiconductor integrated circuit device comprising:

• a plurality of nonvolatile memory cells;
• and
• a driver circuit for driving the plurality of nonvolatile memory cells,
• each of the plurality of nonvolatile memory cells including:
• a substrate having a surface including a first surface region at a first level, a second surface region at a second level lower than the first level, and a step side region linking the first and second surface regions together;
• a channel region formed in the first surface region of the substrate;
• source and drain regions formed to interpose the channel region therebetween;
• an insulating film formed on the surface of the substrate;
• a floating gate formed on the insulating film;
• and
• a control gate capacitively coupled to the floating gate,
• wherein:
• the drain region includes:
• a low-concentration impurity layer which is formed in the second surface region and which has one end extending toward the step side region, and a high-concentration impurity layer which is connected to the low-concentration impurity layer and which is formed in a region distant from the channel region, an impurity concentration of the low-concentration impurity layer being lower than that of the high-concentration impurity layer,
• an extremely-low-concentration impurity layer is formed in a part of the channel region adjacent to the step side region, an impurity concentration of the extremely-low-concentration impurity layer being lower than that of the other part of the channel region,
• the floating gate covers the step side region and at least a part of the low-concentration impurity layer via the insulating film, and
• the first surface region is an upper surface of an epitaxially grown layer formed on the second surface region.