Methods of forming integrated circuit capacitors using mask patterns having constricted neck regions

Abstract

Methods of forming integrated circuit capacitors include the steps of forming a first electrically conductive layer (e.g., polysilicon layer) on a substrate and then forming a masking layer on the first electrically conductive layer. The masking layer is then patterned to define an electrode mask having a constricted neck region therein with reduced transverse cross-sectional area (e.g., reduced width). A step is then performed to etch the first electrically conductive layer using the electrode mask as an etching mask. Upon performance of this etching step, a storage electrode is defined having a constricted neck region therein with reduced transverse cross-sectional area (e.g., reduced width and height). Notwithstanding the reduced cross-sectional area of the constricted neck region, the overall surface area of the storage electrode is increased relative to an electrode having the same general shape but no constricted neck region. For example, the electrode mask may be patterned in the shape of a "bow tie" having a central constricted neck region that is thinner than opposing ends of the mask. An etching step then is performed so that the bow tie shape of the electrode mask is reproduced in the storage electrode. The thickness of the storage electrode may also be reduced in the constricted neck region. As a result, the preferred storage electrode will have a greater surface area than a rectangular shaped electrode having the same general length, width and thickness.

Dependencies are inferred from the claim text.