Method of manufacturing mask ROM devices with self-aligned coding implant
AssigneeAcer Semiconductor Manufacturing Inc.
InventorShye-Lin Wu
Life of this patent
Estimating the term…
Loading patent…
AssigneeAcer Semiconductor Manufacturing Inc.
InventorShye-Lin Wu
Estimating the term…
A method for forming mask read-only memories comprises: A gate oxide layer is formed on a semiconductor substrate. A polysilicon layer is formed on the gate oxide layer. Then, a silicon nitride layer is formed on said polysilicon layer. The gate structures are defined by patterning the silicon nitride layer and the polysilicon layer. Subsequently, the silicon oxide spacers are formed on the sidewalls of the gate structures. An ion implantation is performed to form the buried bit lines in said semiconductor substrate between said gate structures. A BPSG layer is formed on said semiconductor substrate. Then, the BPSG layer is polished until the top surface of said gate structures and the silicon nitride layer is removed. A conductive layer is formed along the surfaces of said residual BPSG layer, silicon oxide spacers and polysilicon layer.
A method for forming mask read-only memories, said method comprises:
A method for forming buried bit line mask read-only memories, said method comprises:
Dependencies are inferred from the claim text.