US 6,143,616 AGranted

Methods of forming coaxial integrated circuitry interconnect lines

AssigneeMicron Technology, Inc.

InventorsJoseph E. Geusic, Kie Y. Ahn, Leonard Forbes

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Abstract

Methods of forming integrated circuitry lines such as coaxial integrated circuitry interconnect lines, and related integrated circuitry are described. An inner conductive coaxial line component is formed which extends through a substrate. An outer conductive coaxial line component and coaxial dielectric material are formed, with the coaxial dielectric material being formed operably proximate and between the inner and outer conductive coaxial line components. In a preferred implementation, the substrate includes front and back surfaces, and a hole is formed which extends through the substrate and between the front and back surfaces. In one implementation, the outer conductive coaxial line component constitutes doped semiconductive material. In another implementation, such constitutes a layer of metal-comprising material. A layer of dielectric material is formed over and radially inwardly of the outer line component. Conductive material is then formed over and radially inwardly of the dielectric material layer. The latter conductive material constitutes an inner conductive coaxial line component. In a preferred implementation, the inner conductive coaxial line component is formed by forming a first material within the hole. A second conductive material is formed over the first material. Subsequently, the substrate is exposed to conditions which are effective to cause the second material to replace the first material.

A method of forming coaxial integrated circuitry interconnect lines comprising:

providing an n-type semiconductive substrate having front and back surfaces;
forming a masking material over one of the front and back surfaces;
forming a plurality of openings into the masking material;
chemically etching pits into the one surface of the semiconductive substrate through the masking material openings;
exposing the one surface to an electrolyte solution while isolating the other of the front and back surfaces from exposure to the electrolyte solution;
during said exposing, illuminating the other of the front and back surfaces to chemically etch a plurality of holes through the semiconductive substrate from the pits to have aspect ratios of at least 100, the holes having sidewalls extending from the front surface to the back surface;
after forming the holes, forming a masking layer over the front surface which exposes the holes;
after forming the masking layer and with the masking layer in place, forming outer conductive coaxial line components by forming n+ diffusion regions through the sidewalls into the n-type semiconductive substrate to extend from the semiconductive substrate front surface to the semiconductive substrate back surface;
forming coaxial dielectric material radially inward and over the diffusion regions within the holes to less than fill remaining volume of the holes and extend from the semiconductive substrate front surface to the semiconductive substrate back surface;
after forming the coaxial dielectric material, depositing polysilicon to fill remaining volume of the holes radially inward of the coaxial dielectric material;
after depositing the polysilicon, forming a metal layer over at least one of the front and back surfaces of the semiconductive substrate;
and
annealing the substrate at a temperature, and for a duration of time, which are effective to cause the metal layer to replace the polysilicon and form coaxial lines through the semiconductive substrate from the front surface to the back surface having aspect ratios of at least 100.

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Abstract

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