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US 6,137,140 AGranted
Integrated SCR-LDMOS power device
AssigneeTexas Instruments Incorporated
InventorsTaylor Rice Efland, Stephen C. Kwan, Kenneth G. Buss, Chin-Yu Tsai
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Abstract
An integrated SCR-LDMOS device (10) having a p+ region (13) in the drain region (12), but otherwise similar to a conventional LDMOS transistor. The device (10) may be implemented as a modification of a non-planar LDMOS (FIGS. 1 and 2). An alternate embodiment, device (30), may be implemented as a modification of a planar LDMOS (FIG. 3). In either case, the added p+ region (13, 37) provides the device (10, 30) with two parasitic bipolar transistors in an SCR configuration (FIGS. 4A and 4B).
Claims14
An integrated SCR-LDMOS device, comprising:
- a semiconductor layer of a first conductivity type;
- a second region of a second conductivity type opposite said first conductivity type formed as a well in said semiconductor layer;
- a third region of said first conductivity type formed as a well in said second region
- a source region of said second conductivity type formed in said third region;
- a drain region of said second conductivity type formed in said second region and spaced apart from said source region, such that a channel is formed between said source region and said drain region;
- a backgate region formed in said third region and adjacent said source region such that said source region separates said backgate region and said channel, said backgate region being of said first conductivity type;
- an anode region of said first conductivity type between said drain region and said channel region;
- a gate oxide layer over said channel;
- and
- a gate over at least part of said source region and said channel.
7 more elements
Dependencies are inferred from the claim text.