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US 6,100,564 AGranted
SOI pass-gate disturb solution
AssigneeInternational Business Machines Corporation
InventorsAndres Bryant, Edward J. Nowak, Minh H. Tong
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AssigneeInternational Business Machines Corporation
InventorsAndres Bryant, Edward J. Nowak, Minh H. Tong
Estimating the term…
An SOI pass-gate disturb solution for an N-type MOSFET wherein a resistor is connected between the gate and the body of the FET to eliminate the disturb condition. The FET is fabricated in a substrate having a source, a drain and a gate, wherein the body of the field effect transistor is electrically floating and the transistor is substantially electrically isolated from the substrate. A high resistance path is provided coupling the electrically floating body of the FET to the gate, such that the body discharges to a low state before significant thermal charging can occur when the gate is low, and thus prevents the accumulation of a charge on the body when the transistor is off. The resistance of the high resistance path is preferably approximately 10.sup.10 Ohms-um divided by the width of the pass-gate.
In a field effect transistor fabricated in a substrate and having a source, a drain and a gate, wherein the body of the field effect transistor is electrically floating and the transistor is substantially electrically isolated from the substrate, the improvement comprising a high resistance path coupling the electrically floating body of the field effect transistor to the gate of the field effect transistor, such that the body discharges to a low state before a significant thermal charging can occur when the gate is low, and thus prevents an accumulation of a charge on the body when the transistor is off.
Dependencies are inferred from the claim text.