Method and apparatus for a N-nary logic circuit using 1 of 4 signals

A system that evaluates a logic circuit that uses 1 of 4 signals, comprising:

• a shared logic tree circuit that evaluates one or more input signals and produces an output signal;
• a first input 1 of 4 signal coupled to said shared logic tree circuit wherein said first input 1 of 4 signal comprises a first bundle of 4 wires routed together between different cells and use a 1 of 4 encoding to indicate multiple values of information conveyed by said first bundle of 4 wires and where at most one and only one wire of said first bundle of 4 wires is true during an evaluation cycle;
• a second input 1 of 4 signal coupled to said shared logic tree circuit wherein said second input 1 of 4 signal comprises a second bundle of 4 wires routed together between different cells and use a 1 of 4 encoding to indicate multiple values of information conveyed by said second bundle of 4 wires and where at most one and only one wire of said second bundle of 4 wires is true during said evaluation cycle;
• and
• an output 1 of 4 signal coupled to said shared logic tree circuit wherein said output 1 of 4 signal comprises a third bundle of 4 wires routed together between different cells and use a 1 of 4 encoding to indicate multiple values of information conveyed by said third bundle of 4 wires and where at most one and only one wire of said third bundle of 4 wires is true during said evaluation cycle.

A method that evaluates a logic circuit that uses 1 of 4 signals, comprising:

• receiving first input 1 of 4 signal coupled to a shared logic tree circuit wherein said first input 1 of 4 signal comprises a first bundle of 4 wires routed together between different cells and use a 1 of 4 encoding to indicate multiple values of information conveyed by said first bundle of 4 wires and where at most one and only one wire of said first bundle of 4 wires is true during an evaluation cycle;
• receiving a second input 1 of 4 signal coupled to said shared logic tree circuit wherein said second input 1 of 4 signal comprises a second bundle of 4 wires routed together between different cells and use a 1 of 4 encoding to indicate multiple values of information conveyed by said second bundle of wires and where at most one and only one wire of said second bundle of 4 wires is true during said evaluation cycle;
• evaluating said first input 1 of 4 signal and said second input 1 of 4 signal with said shared logic tree circuit;
• and
• producing an output 1 of 4 signal from said shared logic tree circuits evaluation, said output 1 of 4 signal couples to said shared logic tree circuit wherein said output 1 of 4 signal comprises a third bundle of 4 wires rout together between different cells and use a 1 of 4 encoding to indicate multiple values of information conveyed by said third bundle of 4 wires and where at most one and only one wire of said third bundle of 4 wires is true during said evaluation cycle.

A method that provides a logic circuit with 1 of 4 signals, comprising:

• providing a shared logic tree circuit that evaluates one or more input signals and produces an output signal;
• coupling a first input 1 of 4 signal to said shared logic tree circuit wherein said first input 1 of 4 signal comprises a first bundle of 4 wires routed together between different cells and use a 1 of 4 encoding to indicate multiple values of information conveyed by said first bundle of 4 wires and where at most one and only one wire of said first bundle of 4 wires is true during an evaluation cycle;
• coupling a second input 1 of 4 signal to said shared logic tree circuit wherein said second input 1 of 4 signal comprises a second bundle of 4 wires routed together between different cells and use a 1 of 4 encoding to indicate multiple values of information conveyed by said second bundle of wires and where at most one and only one wire of said second bundle of 4 wires is true during said evaluation cycle;
• and
• coupling an output 1 of 4 signal to said shared logic tree circuit wherein said output 1 of 4 signal comprises a third bundle of 4 wires routed together between different cells and use a 1 of 4 encoding to indicate multiple values of information conveyed by said third bundle of 4 wires and where at most one and only one wire of said third bundle of 4 wires is true during said evaluation cycle.