US 6,009,496 AGranted

Microcontroller with programmable embedded flash memory

AssigneeWinbond Electronics Corp.

InventorHsi-Jung Tsai

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Abstract

An architecture for microcontroller with embedded flash memory is provided. The microcontroller allows the reprogramming of data into the embedded flash memory of the microcontroller to be performed on-board without having to dismount the entire IC package of the microcontroller from the circuit board and then use a dedicated writer to perform the write operation. The reprogramming operation can be initiated either by an external reprogramming-enable signal or an internal reprogramming-enable signal. When either of these two signals is generated, it causes an OR gate to output a high-voltage logic signal to a multiplexer to thereby cause the multiplexer to select a ROM unit for connection to the microprocessor unit. This allows the microprocessor unit to execute a reprogramming control routine stored in the ROM unit. The flash memory unit further stores a reprogramming detection/initialization routine which checks whether a flash reprogramming request signal is issued from the main-unit interface. With this microcontroller architecture, the reprogramming of data into the embedded flash memory can be performed on-board without having to laboriously dismount the microcontroller from the circuit board. The reprogramming operation is therefore quite easy and quick to perform, thus more cost-effective than the prior art.

Claims12

Dependent claims

A microcontroller coupled to a main-unit interface, which comprises:

a microprocessor unit coupled via an external data bus to said main-unit interface, said microprocessor unit generating an internal reprogramming-enable signal and a set of latch-enable signals for control of data transfer during a reprogramming operation;
a ROM unit used to store a reprogramming control routine therein;
a flash memory unit used to store a main control program for execution by said microprocessor unit to perform a control function specific to said microcontroller;
an external jumper being manually set to generate an external reprogramming-enable signal;
an OR gate coupled to said microprocessor unit and said external jumper for generating a selection signal when either of said internal reprogramming-enable signal and said external reprogramming-enable signal is present;
a multiplexer having two input ends respectively connected to the data buses of said ROM unit and said flash memory unit and one output end connected to the data bus of said microprocessor unit, said multiplexer selecting said ROM unit for connection to said microprocessor unit when said selection signal from said OR gate is present, and selecting said flash memory unit otherwise;
and
a latch buffer coupled between said flash memory unit and said microprocessor unit, said latch buffer being under control in response to the latch-enable signals from said microprocessor unit for data transfer between said flash memory unit and said microprocessor unit;
wherein the generation of either of said internal reprogramming-enable signal and said external reprogramming-enable signal causes said multiplexer to select the ROM unit for connection to the microprocessor unit, causing the microprocessor unit to execute said reprogramming control routine stored in said ROM unit to control a reprogramming operation to write data into said flash memory unit.

6 more elements

A microcontroller coupled to a main-unit interface, which comprises:

a microprocessor unit coupled via an external data bus to said main-unit interface, said microprocessor unit generating an internal reprogramming-enable signal and a set of latch-enable signals for control of data transfer during a reprogramming operation;
a ROM unit used to store a reprogramming control routine therein;
a flash memory unit used to store a main control program for execution by said microprocessor unit to perform a control function specific to said microcontroller;
a multiplexer having two input ends respectively connected to the data buses of said ROM unit and said flash memory unit, said multiplexer selecting said ROM unit for connection to said microprocessor unit when said internal reprogramming-enable signal from said microprocessor unit is present, and selecting said flash memory unit otherwise;
and
a latch buffer coupled between said flash memory unit and said microprocessor unit, said latch buffer being under control in response to the latch-enable signals from said microprocessor unit for data transfer between said flash memory unit and said microprocessor unit;
wherein the generation of said internal reprogramming-enable signal from said microprocessor unit causes said multiplexer to select the ROM unit for connection to the microprocessor unit, causing the microprocessor unit to execute said reprogramming control routine stored in said ROM unit to control a reprogramming operation to write data into said flash memory unit.

4 more elements

Dependencies are inferred from the claim text.