Micro-trench oxidation by using rough oxide mask for field isolation
AssigneeMosel Vitelic, Inc.
InventorsTuby Tu, Chen Kuang-Chao, Cheng-Tsung Ni, Chih-Hsun Chu
Life of this patent
Estimating the term…
Loading patent…
AssigneeMosel Vitelic, Inc.
InventorsTuby Tu, Chen Kuang-Chao, Cheng-Tsung Ni, Chih-Hsun Chu
Estimating the term…
A method of forming isolation region of an integrated circuit by using rough oxide mask is described. First, a layer of first dielectric is formed on the surface of a silicon substrate. The first dielectric layer is then patterned to define active device region and isolation region. Next, a very thin layer of silicon dioxide is formed over the silicon substrate surface, followed by depositing a layer of rough oxide with proper grain size overlaying the silicon dioxide layer. By using rough oxide grains as an etching mask, the silicon dioxide layer and the silicon substrate underneath are spontaneously etched to form multiple trenches in the isolation region. Next, the rough oxide grains and silicon dioxide layers are stripped. Then, filed oxidation is performed to complete the field oxide isolation formation.
A method of forming isolation region of an integrated circuit by means of rough oxide mask, comprising the steps of
A method of forming isolation region of an integrated circuit by means of rough oxide mask, comprising the steps of:
Dependencies are inferred from the claim text.