Poly recessed fabrication method for defining high performance MOSFETS

A method for forming a transistor, comprising:

• providing a semiconductor substrate comprising a dielectric layer, a gate material layer, and a masking layer sequentially formed upon the semiconductor substrate;
• forming an opening within the masking layer to define sidewall surfaces of the masking layer surrounding the opening;
• forming a pair of spacer structures laterally adjacent the sidewall surfaces such that the spacer structures substantially reduce the lateral width of the opening;
• implanting an impurity into a portion of the gate material layer laterally bounded by the spacer structures, wherein a source/drain region within the silicon substrate is substantially free of the impurity;
• forming a grown oxide layer in the portion of the gate material receiving the impurity;
• and
• etching the gate material layer to form a gate conductor, wherein the gate conductor is formed exclusively beneath the grown oxide layer.