Method of forming dual field isolation structures
AssigneeAdvanced Micro Devices, Inc.
InventorsYu Sun, Tuan D. Pham, Mark T. Ramsbey, Chi Chang
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Abstract
A method of providing thick and thin oxide structures reduces step changes between a core region and a peripheral region on an integrated circuit. Thin LOCOS structures are provided in a core region of a flash memory device, and thick LOCOS structures are provided in a peripheral region of the flash memory device. The device and process are not as susceptible to "race track" problems, "oxide" bump problems, and "stringer" problems. The process utilizes two separate nitride or hard mask layers.
Claims20
A method of fabricating an integrated circuit having a core area, an interface area and a peripheral area, the interface area being between the core area and the peripheral area, the peripheral area having least one thick locos structure, the core area having at least one thin locos structure, the thin locos structure and the thick locos structure being formed in a semiconductor substrate, the semiconductor substrate including a first hard mask layer disposed above the substrate, the method comprising:
- providing a first etch resist layer over the first hard mask layer, the first etch resist layer defining the thin locos structure;
- etching the first hard mask layer in accordance with the first etch resist layer;
- growing the thin locos structure;
- stripping the first hard mask layer;
- and
- providing a second hard mask layer over the core region for forming the thick locos structure over whereby the thick locos structure in the peripheral area is formed after the thin locos structure in the core area.
A method of fabricating at least one first isolation region in a first area and at least one second isolation region in a second area on a semiconductor substrate, the first isolation region being thinner than the second isolation region, the semiconductor substrate including a pad oxide layer disposed above the substrate and a first hard mask layer disposed above the pad oxide layer, the method comprising:
- etching the first hard mask layer;
- forming the first isolation region by heating the substrate;
- removing the first hard mask layer;
- and
- providing a second hard mask layer for the second isolation region, whereby the first isolation region is formed before the second isolation region.
A method of fabricating a semiconductor device on a semiconductor substrate, the method comprising:
- providing a first nitride layer over a semiconductor substrate;
- selectively etching the first nitride layer at a plurality of first locations;
- forming a plurality of first oxidized isolation structures at the first locations;
- providing a second nitride layer over the semiconductor substrate;
- selectively etching the second nitride layer at a plurality of second locations;
- and
- forming a plurality of second oxidized isolation structures at the second locations after forming the first oxidized isolation structure, whereby the second isolation structures are thicker than the first isolation structures.
Dependencies are inferred from the claim text.