Silicon nitride-free isolation methods for integrated circuits
AssigneeSamsung Electronics Co., Ltd.
InventorsTai-su Park, Ho-kyu Kang
Life of this patent
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Abstract
Trench isolation methods for integrated circuit substrates may be simplified by eliminating the steps of forming a silicon nitride layer, etching the silicon nitride layer and removing the silicon nitride layer. In particular, a silicon nitride-free mask pattern, such as a photoresist mask pattern, may be formed on a silicon nitride-free integrated circuit substrate. The silicon nitride-free integrated circuit substrate is etched through the silicon nitride-free mask pattern to form a trench in the substrate. An insulating layer is formed in the trench and is chemical-mechanical polished to form a trench isolating layer. By eliminating the silicon nitride layer, simplified processing and improved performance may be obtained.
Claims14
A trench isolation method for an integrated circuit comprising the steps of:
- forming a photoresist mask pattern directly on a bare semiconductor substrate;
- etching the bare semiconductor substrate through the photoresist mask pattern, to form a trench in the substrate;
- forming an insulating layer in the trench;
- chemical-mechanical polishing the insulating layer to form a trench isolating layer in the trench;
- and
- forming a step between the isolation layer and the semiconductor substrate by etching the isolation layer to thereby recess the isolation layer relative to the semiconductor substrate.
A trench isolation method for an integrated circuit comprising the steps of:
- forming a photoresist mask pattern directly on a bare semiconductor substrate;
- etching the bare semiconductor substrate through the photoresist mask pattern, to form a trench in the substrate;
- forming an insulating layer in the trench;
- chemical-mechanical polishing the insulating layer to form a trench isolating layer in the trench;
- and
- forming a step between the isolation layer and the semiconductor substrate by etching the semiconductor substrate to thereby recess the semiconductor substrate relative to the isolation layer.
A trench isolation method for an integrated circuit comprising the steps of:
- forming an oxide layer on a semiconductor substrate;
- forming a photoresist mask pattern on the oxide layer, wherein the oxide layer enhances adhesion between the substrate and the photoresist mask pattern;
- etching the oxide layer and the semiconductor substrate through the photoresist mask pattern, to form a trench in the substrate;
- forming an insulating layer in the trench;
- chemical-mechanical polishing the insulating layer to form a trench isolating layer in the trench;
- and
- forming a step between the isolation layer and the semiconductor substrate by etching the semiconductor substrate to thereby recess the semiconductor substrate relative to the isolation layer.
A trench isolation method for an integrated circuit comprising the steps of:
- forming an oxide layer on a semiconductor substrate;
- forming a photoresist mask pattern on the oxide layer, wherein the oxide layer enhances adhesion between the substrate and the photoresist mask pattern;
- etching the oxide layer and the semiconductor substrate through the photoresist mask pattern, to form a trench in the substrate;
- forming an insulating layer in the trench;
- chemical-mechanical polishing the insulating layer to form a trench isolating layer in the trench;
- and
- forming a step between the isolation layer and the semiconductor substrate by etching the isolation layer to thereby recess the isolation layer relative to the semiconductor substrate.
Dependencies are inferred from the claim text.