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US 5,966,324 AGranted
Static semiconductor memory device driving bit line potential by bipolar transistor shared by adjacent memory cells
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsTomohisa Wada, Yutaka Arita
Life of this patent
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Abstract
Memory cells which are adjacent to each other along a column direction share a bipolar transistor driving the potential level of a corresponding bit line. Other memory cells which are adjacent to each other in the column direction share another bipolar transistor driving the potential level of another corresponding bit line. Each bipolar transistor drives the potential level of the corresponding bit line in response to storage information of a selected memory cell, whereby data can be read at a high speed with a low power supply voltage.
Claims15
A static semiconductor memory device, comprising:
- a plurality of word lines;
- a plurality of bit lines being provided across said word lines;
- and
- a memory cell array including a plurality of memory cells being arranged in the form of a matrix in correspondence to intersections between said word lines and said bit lines, each said memory cell including:
- two input/output nodes,
- a bistable element holding storage data, and
- switching means for switching connection between said bistable element and said input/output nodes in response to selection of corresponding said word line,
- said static semiconductor memory device further comprising:
- a plurality of bipolar transistors each being provided for at least every two said input/output nodes respectively belonging to adjacent said memory cells in each line of said memory cells aligned in a predetermined direction for driving the potential level of corresponding said bit line in response to potential levels of said input/output nodes of selected said memory cell.
6 more elements
Dependencies are inferred from the claim text.