US 5,966,323 A · Low switching field magnetoresistive tunneling junction for high density arrays

Abstract

A low switching field magnetoresistive tunneling junction memory cell including a first exchange coupled structure having a pair of magnetoresistive layers and an exchange interaction layer sandwiched therebetween so as to pin the magnetic vectors of the pair of layers anti-parallel, a second exchange coupled structure having a pair of magnetoresistive layers and an exchange interaction layer sandwiched therebetween so as to pin the magnetic vectors of the pair of layers anti-parallel, and electrically insulating material sandwiched between the first and second exchange coupled structures to form a magnetoresistive tunneling junction. Each of the first and second exchange coupled structures, and hence the memory cell, has no net magnetic moment.

Claims12

Dependent claims

A low switching field magnetoresistive tunneling junction memory cell comprising:

a first exchange coupled multi-layer structure including a pair of magnetoresistive layers having an exchange interaction layer situated in parallel juxtaposition between the pair of magnetoresistive layers, the pair of magnetoresistive layers each having a magnetic vector and the magnetic vectors always being pinned anti-parallel by coupling of the exchange interaction layer;
a second exchange coupled multi-layer structure including a pair of magnetoresistive layers having an exchange interaction layer situated in parallel juxtaposition between the pair of magnetoresistive layers, the pair of magnetoresistive layers each having a magnetic vector and the magnetic vectors always being pinned anti-parallel by coupling of the exchange interaction layer;
and
electrically insulating material situated in parallel juxtaposition between the first and second exchange coupled multi-layer structures to form a magnetoresistive tunneling junction.

1 more element

A high density array of low switching field magnetoresistive tunneling junction memory cells comprising:

a substrate with a planar surface;
and
a plurality of interconnected low switching field magnetoresistive tunneling junction memory cells supported on the planar surface of the substrate and interconnected to form a memory array, each cell of the plurality of cells having an aspect ratio less than 5 and a top plan that is one of circular, diamond-shaped, or elliptical, each cell including
a first exchange coupled multi-layer structure with no net magnetic moment including a pair of magnetoresistive layers having an exchange interaction layer situated in parallel juxtaposition between the pair of magnetoresistive layers, the pair of magnetoresistive layers each having a magnetic vector and the magnetic vectors always being pinned anti-parallel by coupling of the exchange interaction layer,
a second exchange coupled multi-layer structure with near zero magnetic moment including a pair of magnetoresistive layers having an exchange interaction layer situated in parallel juxtaposition between the pair of magnetoresistive layers, the pair of magnetoresistive layers each having a magnetic vector and the magnetic vectors always being pinned anti-parallel by coupling of the exchange interaction layer, and
electrically insulating material situated in parallel juxtaposition between the first and second exchange coupled multi-layer structures to form a magnetoresistive tunneling junction with near zero magnetic moment.

3 more elements

Dependencies are inferred from the claim text.

Low switching field magnetoresistive tunneling junction for high density arrays

Life of this patent

Low switching field magnetoresistive tunneling junction for high density arrays

Life of this patent

Abstract

Claims12