Variable capacitor and method for fabricating the same
AssigneeMotorola, Inc.
InventorsDavid Lewis Stolfa, Kenneth D. Cornett
Life of this patent
Estimating the term…
Abstract
A voltage variable capacitor (10) fabricated on a semiconductor substrate (11) includes a gate structure (62) and a well (22) under the gate structure (62). A heavily doped buried layer (15) and a heavily doped contact region (31) in the semiconductor substrate (11) form a low resistance conduction path from the well (22) to a surface (17) of the semiconductor substrate (11). A multi-finger layout is used to construct the voltage variable capacitor (10). In operation, when a voltage applied across the voltage variable capacitor (10) changes, the width of depletion region in the well (22) changes, and the capacitance of the voltage variable capacitor (10) varies accordingly.
Claims15
A variable capacitor, comprising:
- a semiconductor substrate having a major surface;
- a plurality of wells of a first conductivity type and a first dopant concentration in said semiconductor substrate;
- a plurality of contact regions of the first conductivity type and a second dopant concentration in said semiconductor substrate, the second dopant concentration being higher than the first dopant concentration, and a first contact region and a second contact region of said plurality of contact regions sandwiching a first well of said plurality of wells;
- a buried layer of the first conductivity type and a third dopant concentration in said semiconductor substrate and underlying said plurality of wells and said plurality of contact regions, the third dopant concentration being higher than the first dopant concentration;
- and
- a plurality of gate structures over the major surface of said semiconductor substrate and overlying said plurality of wells.
A variable capacitor, comprising:
- a body of semiconductor material having a major surface;
- a buried layer in said body of semiconductor material and at a depth from the major surface of said body of semiconductor material, said buried layer having a first conductivity type and a first dopant concentration;
- a plurality of wells extending from the major surface into said body of semiconductor material to the depth, said plurality of wells having the first conductivity type and a second dopant concentration lower than the first dopant concentration;
- a plurality of sinkers adjacent said plurality of wells and extending from the major surface into said body of semiconductor material to the depth, said plurality of sinkers having the first conductivity type and a third dopant concentration higher than the second dopant concentration;
- a dielectric layer over said body of semiconductor material and overlying said plurality of wells;
- and
- a plurality of conductive regions over said dielectric layer.
Dependencies are inferred from the claim text.