Methods of determining parameters of a semiconductor device and the width of an insulative spacer of a semiconductor device
AssigneeVLSI Technology, Inc.
InventorsSubhas Bothra, Xi-Wei Lin
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AssigneeVLSI Technology, Inc.
InventorsSubhas Bothra, Xi-Wei Lin
Estimating the term…
The present invention provides methods of determining a smallest dimension of a fabricated device on a semiconductor substrate, methods of determining width of a structure comprising a refractory metal silicide, methods of determining parameters of a semiconductor device comprising a refractory metal silicide, and methods of determining width of an insulative spacer of a semiconductor device. One aspect of the present invention provides a method of determining a smallest dimension of a fabricated device on a semiconductor substrate comprising: providing a first substrate area and a second substrate area; subjecting the first substrate area and the second substrate area to the same processing conditions to achieve regions of like material on the first and second substrate areas, the like material in the first area having a smallest dimension which is greater than a smallest dimension of the like material in the second area; determining parameters of the first substrate area; and determining said smallest dimension of the like material in the second substrate area using the determined parameters of the first substrate area.
A method of determining a smallest dimension of a fabricated device on a semiconductor substrate comprising:
A method of determining a width of a structure comprising a second refractory metal silicide, the width being less than 0.5 microns, the method comprising:
A method of determining parameters of a semiconductor device comprising a refractory metal silicide comprising:
A method of determining the width of an insulative spacer of a semiconductor device, comprising:
A method of determining parameters of a semiconductor device comprising a refractory metal silicide, the method comprising the steps of:
Dependencies are inferred from the claim text.
No related US applications are recorded in the indexed filing history.
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Structural arrangements therefor: circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or…
Characterised by the properties tested or measured, e.g. structural or electrical properties: structural properties, e.g. testing or measuring…
Generic processes or apparatus for the manufacture or treatment of devices covered
Term ended 9 May 2017 (estimated)
USPTO file history isn’t available for this patent, so only indexed dates are shown.
The present invention relates to methods of determining parameters of a semiconductor device and the width of an insulative spacer of a semiconductor device.
The polysilicon critical dimension (CD) is an important parameter in semiconductor fabrication. In particular, the critical dimension of the polysilicon determines the L.sub.eff which impacts the transistor properties. This parameter should be accurately controlled in a MOS fabrication facility.
The polysilicon linewidth may be typically determined by using the measured line resistance and sheet resistance of the substrate. Sheet resistance is measured in Ohms/square and is defined as the resistivity of the substrate divided by the substrate's thickness. The sheet resistance of a substrate is the resistance measured between the opposite sides of a square of that substrate.
Preferred embodiments of the invention are described below with reference to the following accompanying drawings.
FIG. 1 is a conventional graphical representation of the sheet resistance of a refractory metal silicide structure versus the linewidth of the refractory metal silicide structure.
FIG. 2 is an illustrative view of a Van der Pauw structure coupled with a test substrate.
This disclosure of the invention is submitted in furtherance of the constitutional purposes of the U.S. Patent Laws "to promote the progress of science and useful arts" (Article 1, Section 8).
The present invention provides methods of calculating parameters, including critical dimensions, of semiconductor devices comprising a refractory metal silicide structure.
In accordance with one aspect of the present invention, a method of determining a smallest dimension of a fabricated device on a semiconductor substrate comprises: providing a first substrate area and a second substrate area; subjecting the first substrate area and the second substrate area to the same processing conditions to achieve regions of like material on the first and second substrate areas, the like material in the first area having a smallest dimension which is greater than a smallest dimension of the like material in the second area; determining parameters of the first substrate area; and determining said smallest dimension of the like material in the second substrate area using the determined parameters of the first substrate area.