Gate electrode stack with diffusion barrier

A gate electrode stack formed on a semiconductor substrate, said gate electrode stack comprising:

• a gate oxide layer formed over a semiconductor substrate;
• a polysilicon layer formed over said gate oxide layer;
• a diffusion barrier formed over and in contact with said polysilicon layer, said diffusion barrier including a layer composed of both tungsten silicon nitride and titanium silicon nitride;
• and
• a refractory metal layer formed over and in contact with said diffusion barrier.

A diffusion barrier comprising:

• a first surface in contact with a silicon-containing material, said silicon-containing material being formed over a semiconductor substrate;
• a second surface opposite said first surface, said second surface being in contact with an electrically conductive material that is reactive with silicon when exposed to heat;
• and
• a layer composed of both tungsten silicon nitride and of titanium silicon nitride situated between said first and second surfaces and having a bulk resistivity less than 2,000 microhm-cm.

A structure formed on a semiconductor substrate, said structure comprising:

• a polysilicon layer positioned over said semiconductor substrate;
• a first electrically conductive layer composed of both tungsten silicon nitride and titanium silicon nitride positioned over said polysilicon layer, wherein said structure has a thickness and said first electrically conductive layer has a bulk resistivity less than 2,000 microhm-cm and a peak-to-peak surface roughness less than 25% of the thickness of said structure;
• and
• a second electrically conductive layer composed of a refractory metal and positioned over said first electrically conductive layer.