Semiconductor CMOS device with circuit for preventing latch-up

#This invention relates to a semiconductor device having a latch-up protection circuit formed on a semiconductor substrate for preventing a latch-up.

#Consider a semiconductor device having an internal Complementary Metal Oxide Semiconductor (CMOS) circuit and an electrostatic breakdown protection circuit formed in an input circuit through which an input signal is input to the CMOS circuit. When an excessive voltage such as electrostatic surge, etc. is input from an input line to the CMOS circuit through the electrostatic breakdown protection circuit, the excessive voltage sometimes triggers a latch-up. Therefore, a latch-up protection circuit is formed on the semiconductor substrate for preventing a latch-up from occurring in the CMOS circuit. The latch-up protection circuit typically has an impurity diffusion region which surrounds the electrostatic breakdown protection circuit on a surface of a semiconductor substrate (called surrounding diffusion region hereinafter). The surrounding diffusion region and the electrostatic breakdown protection circuit form a multicollector type of parasitic bipolar transistor. Hence, as shown in the following first comparative example, a part of the surge can be discharged as a collector current from the input line to the surrounding diffusion region. Consequently, the latch-up protection circuit, which reduces a ratio of the surge flowing into the CMOS circuit, prevents the latch-up from occurring in the CMOS circuit.

#Now, in a semiconductor device having a CMOS circuit, for example, in a semiconductor memory device represented by a dynamic random access memory (DRAM), a substrate bias is applied to a semiconductor substrate of the semiconductor device in order to ensure optimum working of the CMOS circuit. The semiconductor device usually has a built-in substrate bias generating circuit for generating a substrate bias to be applied to the semiconductor substrate, because the substrate bias is indispensable for the device to function as a semiconductor device and because the built-in substrate bias generating circuit makes the semiconductor device easy to use. The substrate bias generated by the built-in substrate bias generating circuit is applied to the semiconductor substrate through a diffusion region for applying the substrate bias.

#The objects and features of the invention may be understood with reference to the following detailed description of an illustrative embodiment of the invention, taken together with the accompanying drawings in which:

#FIG. 1 is a cross-sectional view showing a semiconductor device according to a first embodiment of the present invention;

#FIG. 2 shows a schematic pattern layout of the semiconductor device according to the first embodiment of the present invention;

#Referring to the drawings, preferred embodiments of the semiconductor devices according to the present invention are shown. Each drawing roughly shows the shape or the arrangement of parts of the semiconductor device, and hatching is partly omitted from sectional views, in order to understand the present invention.

#A first comparative example, a second comparative example and third comparative example are briefly shown to understand the present invention more easily before the preferred embodiments are described.

#First Comparative Example