US 5,960,289 AGranted

Method for making a dual-thickness gate oxide layer using a nitride/oxide composite region

AssigneeMotorola, Inc.

InventorsPaul G. Y. Tsui, Hsing-Huang Tseng, Navakanta Bhat, Ping Chen

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Abstract

A method for forming a dual gate oxide (DGO) structure begins by forming a first oxide layer (106) within active areas (110) and (112). A protection layer (108a) is then formed over the layer (106). A mask (114) is used to allow removal of the layers (106 and 108a) from the active area (110). A thermal oxidation process is then used to form a thin second oxide layer (118) within an active area (110). Conductive gate electrodes (120a and 120b) are then formed wherein the first oxide layer (106) and the protection layer (108c) are incorporated into the gate dielectric layer of an MOS transistor (122a). The transistor (122b) has a thinner gate oxide layer that excludes the protection layer (108c).

Claims20

Dependent claims

A method for making a semiconductor structure, the method comprising the steps of:

providing a substrate having a first active area and a second active area separated by an isolation region;
forming a first oxide layer over both the first and second active areas;
forming a protection layer over the first oxide layer;
masking the protection layer overlying the first active area using a masking layer;
etching the protection layer and the first oxide layer overlying the second active area while the masking layer protects the first oxide layer and the protection layer overlying the first active area;
forming a second oxide layer overlying the second active area where the protection layer prevents a substantial oxidization in the first active area;
and
forming conductive gate electrodes over the first and second active areas wherein a composite of the protection layer and the first oxide layer forms a gate dielectric for conductive gate electrodes in the first active area and the second oxide layer forms a gate dielectric for conductive gate electrodes in the second active area.

5 more elements

A method for forming a semiconductor structure, the method comprising the steps of:

providing a substrate having a first active area and a second active area separated by a trench isolation region;
forming a first thermal silicon dioxide layer over both the first and second active areas to a thickness less than roughly 150 angstroms;
forming a silicon oxynitride layer over first thermal silicon dioxide layer, the silicon oxynitride layer having a thickness of less than roughly 30 angstroms;
masking the silicon oxynitride layer overlying the first active area using a photoresist masking layer;
etching the silicon oxynitride layer and first thermal silicon dioxide layer overlying the second active area while the masking layer protects first thermal silicon dioxide layer and the silicon oxynitride layer overlying the first active area, said etching being performed by a wet chemistry comprising HF;
removing the photoresist masking layer;
cleaning a surface of the second active area;
forming a second thermal silicon dioxide layer overlying the second active area;
and
forming conductive gate electrodes over the first and second active areas wherein a composite of the silicon oxynitride layer and the first thermal silicon dioxide layer forms a gate dielectric for conductive gate electrodes in the first active area and the second thermal silicon dioxide layer forms a gate dielectric for conductive gate electrodes in the second active area.

7 more elements

Dependencies are inferred from the claim text.