US 5,939,745 A · Dynamic access memory using silicon-on-insulator

Abstract

The present invention discloses a method for making a dynamic random access memory by silicon-on-insulator comprising the steps of: dividing a cell area and a peripheral area on a first silicon substrate and recessing just the cell area where a memory device is formed; forming a first insulating layer by isolation of electrical elements in order to divide an active region and a passive region; forming and patterning a first conductive layer through a contact to which the active region and a capacitor are connected on the insulating layer to form a storage node; forming a dielectric layer of the capacitor on the storage node; forming and patterning a polysilicon layer on the dielectric layer to form a storage node; forming a second insulating layer on the plate node and planarizing the insulating layer by thermal treatment; forming a third conductive layer to a predetermined thickness on the planarized insulating layer; polishing and planarizing the third conductive layer by chemical-mechanical polishing technique, using the second insulating layer as an etchstopper and bonding a second silicon substrate on the planarized third conductive layer; planarizing a backside of the first substrate by a chemical-mechanical polishing technique and exposing the active region; and forming a switching element on the forming a bit line.

Claims9

Dependent claims

A semiconductor memory having a memory cell portion and a peripheral portion, comprising:

a substrate having top, bottom, and side surfaces, the substrate being formed only in the peripheral portion;
a silicon-on-insulator layer, formed in the memory cell portion, having top and bottom surfaces, wherein the bottom surface of the silicon-on-insulator is higher than the bottom surface of the substrate;
a first insulating layer formed under the silicon-on-insulator layer and on the side surface of the substrate, wherein a contact hole is formed in a portion of the first insulating layer in the memory cell portion to expose the silicon-on-insulator;
and
a capacitor formed in the memory cell area, wherein the capacitor has a storage node electrically connected to the silicon-on-insulator layer through the contact hole, an insulator surrounding the storage node, and a plate node surrounding the insulator.

2 more elements

Dependencies are inferred from the claim text.

Dynamic access memory using silicon-on-insulator

Life of this patent

Dynamic access memory using silicon-on-insulator

Life of this patent

Abstract

Claims9