Preprogramming testing in a field programmable gate array

An integrated circuit comprising

• a plurality of terminals for providing electrical paths to and from said integrated circuit;
• a plurality of conducting lines including a set of said line segments;
• each line segment having a first node and a second node displaced from said first node;
• and
• means for independently accessing a first node of a selected line segment from a first selected one of said terminals and a second node of said selected line segment from a second selected one of said terminals responsive to address signals to others of said terminals to create a first path between said first selected one of said terminals and said first node and a second path between said second selected one of said terminals and said second node;
• wherein the continuity of said selected line segment between said first and second nodes is testable via said first and second paths.

An integrated circuit comprising

• an array of circuit blocks, said circuit blocks programmable for logic or memory functions;
• a plurality of conducting lines connected to each of said blocks so that said array of circuit blocks when programmed for memory functions are functionally interconnected;
• a plurality of line segments connected to each of said blocks;
• programmable elements, each programmable element located between two line segments and programmable by a programming voltage across said two line segments to program a circuit block connected to said two line segments;
• means connected to each of said line segments for independently placing selected signals on selected line segments responsive to address signals to test circuit blocks connected to said selected line segments;
• and
• means for monitoring said tested blocks through said conducting lines.