US 5,858,841 AGranted

ROM device having memory units arranged in three dimensions, and a method of making the same

AssigneeUnited Microelectronics Corp.

InventorChen-Chung Hsu

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Abstract

A three-dimensional ROM device includes a silicon substrate having plurality of parallel trenches formed in an upper surface thereof, and a plurality of raised mesa regions. Each trench has a bottom and a pair of sidewalls, and is separated from an adjacent trench by a respective mesa region. A plurality of separated, parallel source/drain regions are provided, including a first and second source/drain region located on respective opposite sides of a respective trench bottom, and a third and fourth source/drain region located on respective opposite sides of a respective raised mesa region. Each source/drain region serves as a bit line. A gate oxide layer is located on the upper surface of the silicon substrate. A plurality of sidewall oxide layers are formed on selected sidewalls and serve as channel barriers. A plurality of silicon nitride layers are formed above selected mesa regions and trench bottoms, and serve as channel barriers. A plurality of gate layers are located over the gate oxide layer and the silicon nitride layers and serve as word lines. A region between any two adjacent source/drain regions comprises a channel region.

Claims6

Dependent claims

A method of making a three-dimensionally arranged ROM device, comprising:

forming a plurality of parallel trenches in an upper surface of a silicon substrate, each trench having a bottom and a pair of sidewalls, and being separated from an adjacent trench by a respective one of a plurality of raised mesa regions;
depositing a silicon nitride layer over the silicon substrate;
patterning the silicon nitride layer to expose a portion of the trench bottoms, and a portion of the raised mesa regions, and thereby forming a plurality of silicon nitride layers;
using the patterned silicon nitride layers as a mask, and implanting ions in the exposed portions to form a plurality of source/drain regions with the unexposed portions of the trench bottoms and the raised mesa regions forming channel regions;
forming a plurality of sidewall oxide layers on the respective trench sidewalls;
removing selected sidewall oxide layers for program coding of the ROM device;
removing selected silicon nitride layers for program coding of the ROM device;
forming a gate oxide layer over the upper surface of the silicon substrate;
depositing a polysilicon layer over the silicon nitride layers and gate oxide layer;
and
patterning the polysilicon layer to form a plurality of polysilicon word lines.

8 more elements

Dependencies are inferred from the claim text.