Element-to-element interconnection in semiconductor device

A non-volatile semiconductor memory device comprising:

• a semiconductor substrate;
• a first transistor formed in a first region of said semiconductor substrate and having a laminated type gate structure including a floating gate, a control gate and an insulating film interposed therebetween;
• and
• a second transistor formed in a second region of said semiconductor substrate and having a gate electrode formed of at least a first conductive layer and a pair of impurity diffusion layers;
• wherein a second conductive layer constituting said control gate of said first transistor extends to connect directly to one of said pair of impurity diffusion layers of said second transistor, and said first and second conductive layers are made of the same conductive material.

A semiconductor device comprising:

• a semiconductor substrate;
• an element isolation structure formed on said semiconductor substrate to define at least first and second element active regions isolated by said element isolation structure;
• a first conductive layer formed over a surface of said semiconductor substrate across said first element active region and serving as a floating gate electrode of a first transistor, said first conductive layer having one end portion disposed on said element isolation structure;
• a second conductive layer formed over the surface of said semiconductor substrate in said second element active region and serving as a gate electrode of a second transistor, said second transistor having a pair of impurity diffusion layers;
• and
• a third conductive layer formed over said first conductive layer with an insulating film interposed therebetween and extending over said element isolation structure so as to directly connect with one of said pair of impurity diffusion layers of said second transistor.