MOS-controlled thyristor using a source cathode elecrode as the gate electrode of a MOSFET element

An MOS gate switchable power semiconductor component comprising a semiconductor body having a plurality of parallel-switched, side-by-side arranged unit cells that form a thyristor structure which consists of a p-emitter layer adjacent to an anode electrode attached to a lower surface of said body, a weakly doped n-base layer on said p-emitter layer, a p-base layer on said n-base layer, and an n-emitter layer composed of a highly doped n+-region bordered by a more weakly doped n-region, with said n-emitter layer and portions of said p-base layer adjacent to a top surface of said body;

• a pair of spaced p+-regions formed inside said n-emitter layer at said top surface such that the pair of p+-regions serve as source and drain regions of a first p-channel lateral MOSFET, whereby said p+-source region is formed at portions of said highly doped n+-region, said more weakly doped n-region and at the interface of both said highly doped n+-region and said more weakly doped n-region, while said drain region is formed inside said more weakly doped n-region;
• a first insulating gate electrode formed on the top surface of the body between said source and drain regions and separated form said source and drain regions by a first gate insulation layer, thereby completing said first MOSFET;
• a first metal cathode electrode in electrical contact with only said drain region;
• a second metal cathode electrode which simultaneously makes contact with said p+-source region (5a) of said first MOSFET and with said highly doped n+-region (4b) of said n-emitter layer;
• wherein a second p-channel lateral MOSFET is formed from the p+-source region of the first MOSFET that makes contact with the first metal cathode electrode, the surface area of the p-base layer at said top surface, and a portion of the surface area of the weakly doped n-region at said top surface between the p+-source region and the surface area of the p-base layer:
• and a second insulating gate electrode for the second MOSFET including a second gate insulation layer formed on said top surface of the body between the p+-source region and the surface area of the p base layer, and said first metal cathode electrode which extends over said second gats insulation layer;
• and,
• wherein the breakdown voltage of said first lateral p-channel MOSFET exceeds the absolute value of the threshold voltage of said second lateral p-channel MOSFET (M2) by more than two volts.