US 5,854,501 A · Floating gate semiconductor device having a portion formed with a recess

Abstract

A memory device, and a method for manufacturing same, comprises a semiconductor layer having a first surface and a second surface, and further having a trench therein. The memory device further comprises a transistor source within the first surface of the semiconductor layer, the source having a lower surface, wherein a bottom of the trench extends below the lower surface of the source. A transistor drain within the second surface of the semiconductor layer comprises a lower surface with the trench bottom extending below the lower surface of the drain and wherein the trench separates the source and drain. The memory device further comprises a transistor channel along at least the bottom of the trench, a floating gate at least partially within the trench, and a control gate overlying the floating gate.

Claims12

Dependent claims

A semiconductor device comprising:

a semiconductor layer having a trench therein, said trench having a bottom, first and second sides, and in cross section comprises a "V" shape;
an oxide layer having a generally uniform thickness formed over said bottom and said first and second sides;
a transistor source and a transistor drain separated by said trench, said source and said drain each having a lower surface, said trench bottom being below said lower surface of at least one of said source and said drain;
a transistor channel along said bottom of said trench;
a floating gate at least partially within said trench;
and
a control gate overlying said floating gate.

4 more elements

A memory device comprising:

a semiconductor layer having a first surface and a second surface and further having a trench therein, said trench having a bottom and first and second sides and a depth of between about 3,000 .ANG. and about 7,000 .ANG.;
a first oxide insulation layer consisting essentially of tunnel oxide having a generally uniform thickness of between about 30 .ANG. and about 200 .ANG. formed over said bottom and said first and second sides;
a transistor source within said first surface of said semiconductor layer, said source having a lower surface, wherein a bottom of said trench extends below said lower surface of said source;
a transistor drain within said second surface of said semiconductor layer, said drain having a lower surface, wherein said bottom of said trench extends below said lower surface of said drain, and wherein said trench separates said source and said drain;
a transistor channel along at least said bottom of said trench;
a floating gate having a thickness of between about 500 .ANG. and about 1,500 .ANG. formed at least partially within said trench;
a control gate having a thickness of between about 1,500 .ANG. and about 3,000 .ANG. superjacent and overlying said floating gate;
a second oxide layer having a thickness of between about 50 .ANG. and about 100 .ANG. interposed between said floating gate and said control gate;
a nitride layer having a thickness of between about 100 .ANG. and about 250 .ANG. interposed between said floating gate and said control gate,
wherein said first oxide layer is interposed between said trench bottom and said floating gate.

7 more elements

Dependencies are inferred from the claim text.

Floating gate semiconductor device having a portion formed with a recess

Life of this patent

Floating gate semiconductor device having a portion formed with a recess

Life of this patent

Abstract

Claims12