Method of making nonvolatile memory elements with selector transistors
AssigneeOki Electric Industry Co., Ltd.
InventorMasami Ikegami
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AssigneeOki Electric Industry Co., Ltd.
InventorMasami Ikegami
Estimating the term…
A simplified manufacturing process of a semiconductor memory 10, in which after a layer-built structure is formed of a control-gate conductive layer 19, an intergate insulating film 17, and a floating-gate conductive layer 18, a contact hole for a connector 21 for connecting the floating-gate conductive layer 18 and the control-gate conductive layer 19 together is formed in two stages: by forming a first contact hole 24 passing through the control-gate conductive layer 19 and opening above the intergate insulating film 17, and then forming a second contact hole 26 passing through the intergate insulating film 17 and opening to the floating-gate conductive layer 18, and the first contact hole 24 is formed in conjunction with patterning of a control gate g1, and the second contact hole 26 is formed in conjunction with the formation of a drain contact hole 20.
A method of manufacturing a semiconductor memory including a plurality of memory elements arranged in a matrix formation on a semiconductor substrate, each memory element having a floating gate and a control gate, and selector transistors, each provided with a gate, for selecting said memory elements, comprising the steps of:
A method of manufacturing a semiconductor memory including a plurality of memory elements arranged in a matrix formation on a semiconductor substrate, each memory element having a floating gate and a control gate, and selector transistors, each provided with a gate, for selecting said memory elements, comprising the steps of;
Dependencies are inferred from the claim text.