Method of manufacturing dynamic random access memory

A method of manufacturing dynamic random access memory comprising the steps of:

• providing a substrate having a field effect transistor formed thereon, wherein the field effect transistor includes a first source/drain region and a second source/drain region;
• forming a first dielectric layer over the substrate structure;
• patterning the first dielectric layer to form a first self-aligned contact opening;
• forming a first conductive layer over the substrate structure to form an electrical connection with the first source/drain region;
• forming a cap layer over the first conductive layer;
• patterning the first conductive layer and the cap layer to form a bit line;
• forming spacers on the sidewalls of the bit line;
• forming a second dielectric layer and a third dielectric layer sequentially over the substrate structure;
• forming a stack of sacrificial layers above the third dielectric layer, wherein the stack of sacrificial layers is formed by depositing first insulating layers and second insulating layers alternately over each other;
• patterning the stack of sacrificial layers to form a wide opening exposing a portion of the third dielectric layer;
• performing a wet etching operation, wherein the etchant has a different etching rate for the first insulating layer and the second insulating layer so that the stack of sacrificial layers on the sidewalls of the wide opening turns into a gear-teeth cross-sectional profile with a plurality of cavities;
• patterning the third dielectric layer, the second dielectric layer and the first dielectric layer to form a second self-aligned contact opening that exposes the second source/drain region;
• forming a second conductive layer over the substrate structure, wherein the conductive material completely fills the cavities and surface of the gear-teeth profile, as well as completely filling the second self-aligned contact opening so that the conductive layer is electrically coupled to the second source/drain region;
• using the third dielectric layer as an etching stop layer, removing the sacrificial layers to expose the second conductive layer that becomes a storage electrode
• forming a dielectric thin film over the exposed second conductive layer;
• and
• forming a third conductive layer over the dielectric thin film, wherein the third conductive layer acts as a cell electrode.