Semiconductor device having a second insulating layer which includes carbon or fluorine at a density lower than a first insulating layer
AssigneeKabushiki Kaisha Toshiba
InventorTadashi Matsuno
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AssigneeKabushiki Kaisha Toshiba
InventorTadashi Matsuno
Estimating the term…
This invention is related to a metallization of Cu. The semiconductor device comprises a first insulating layer having a groove in a surface thereof, a second insulating layer on a surface of the groove, made of a material having a low density of crystal defects in comparison with that of the first insulating layer, and a wiring layer buried in the groove, surrounded by the second insulating layer.
A semiconductor device comprising:
A semiconductor device comprising:
A semiconductor device comprising:
Dependencies are inferred from the claim text.
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Characterised by their insulating parts: comprising two or more dielectric layers having different properties, e.g. different dielectric constants
Characterised by their insulating parts: insulating materials thereof
Generic packages, interconnections, connectors or other constructional details of devices covered by
Term ended 2 Apr 2017 (estimated)
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The present invention relates to a metallization of Copper.
In manufacturing semiconductor devices such as VLSI, etc., the wiring technology is a very important. Wiring is also important in the development of devices such as transistors. Cu (copper) has less resistance than Al (aluminum) which has been used most frequently, and hardly generates problems such as electro-migration. From this feature, the Cu wiring has a characteristic of higher reliability than the Al wiring. Efforts have therefore been made to increase the use of Cu as a wiring material in recent years.
However, when Cu or a metal containing Cu is used as a wiring material, Cu is diffused in an interlayer insulating layer (normally composed of a silicone oxide film) and this diffused Cu causes a problem of current leakage between wires. Therefore, to prevent diffusion of Cu that is used as a wiring material, it is necessary to cover the surface of Cu wire with a metal having a high melting point such as titanium (Ti) or tungsten (W) as a barrier metal layer.
A more complete appreciation of the present invention and many of its attendant advantages will be readily obtained by reference to the following detailed description considered in connection with the accompanying drawings, in which:
FIG. 1 is a sectional view of a conventional metallization of Cu;
FIGS. 2(a) and 2(b) are sectional views of structures of a semiconductor device according to a first embodiment;
Embodiments of the present invention will be described in detail with reference to the drawings.
FIGS. 2(a) and 2(b) are sectional views illustrating the structure of a semiconductor device according to the first embodiment of the present invention. FIG. 2(a) illustrates a semiconductor device having a single wiring layer and FIG. 2(b) illustrates a semiconductor device having double wiring layers.
As illustrated in FIGS. 2(a) and 2(b), in case of a semiconductor device according to this embodiment, the wiring layer 6 composed of, for instance, an alloy of Cu or Al and Cu, etc. or a metal containing Cu is buried in the interlayer insulating layer 2 on the semiconductor substrate 1 in the same manner as before. Further, although not shown in FIG. 2, semiconductor devices such as transistors are formed on the semiconductor substrate 1. These semiconductor devices and the wiring layer 6 are separated by the interlayer insulating layer 2. This interlayer insulating layer 2 is composed of an insulating film having a lower dielectric constant such as silicon oxide, etc., containing fluorine in the same manner as before. Further, to prevent Cp contained in this wiring layer 6 from diffusing in the interlayer insulating layer 6, the surface of the wiring layer 6 is covered by the barrier metal layer 5 composed of a material such as, TiN.