ESD protection circuit using zener diode and interdigitated NPN transistor

A multiple emitter electrostatic discharge circuit protection structure, comprising:

• a. a first semiconductor layer (42) having a first conductivity type;
• b. a second semiconductor layer (44) having a second conductivity type opposite that of the first semiconductor layer, disposed in overlying relation to the first semiconductor layer (42);
• c. a third semiconductor layer (46) of the second conductivity type;
• d. a plurality of first regions (50) of the second conductivity type, the first regions (50) electrically connecting with the second semiconductor layer (44);
• e. a plurality of second regions (56) laterally spaced from the plurality of first regions (50), the second regions having the first conductivity type, the second regions (56) being electrically connected to the third semiconductor layer (46);
• f. a plurality of third regions (62) and a plurality of fourth regions (64) interposed between the second regions (56), the third and fourth regions having a similar conductivity type;
• and
• g. a plurality of laterally spaced fifth regions (65) each at least partially physically contacting a respective third (62) region, the fifth regions each having a conductivity type dissimilar from the third (62) and fourth (64) regions.